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		Verilog digital system design : RT level synthesis, testbench, and verification / Zainalabedin Navabi. by Navabi, Zainalabedin Series: McGraw-Hill electronic engineering series Edition: 2nd ed. Material type: Text; Format: print ; Literary form: Not fiction ; Audience: Preschool; Language: English Publication details: New York : McGraw-Hill, c2006 Online resources: Table of contents only Contributor biographical information Publisher description Availability: Items available for loan: Phòng DVTT Tổng hợp (1)Call number: 621.39/2 NAV 2006. Place hold Log in to add tags Add to cart (remove)
		Phase-locked loop synthesizer simulation / Giovanni Bianchi. by Bianchi, Giovanni Series: McGraw-Hill electronic engineering series Material type: Text; Format: print ; Literary form: Not fiction ; Audience: Preschool; Language: English Publication details: New York : McGraw-Hill, c2005 Online resources: Table of contents only Contributor biographical information Publisher description Availability: Items available for loan: Phòng DVTT KHTN & XHNV (1)Call number: 621.3815/364 BIA 2005. Place hold Log in to add tags Add to cart (remove)
		Applied formal verification / Douglas L. Perry, Harry D. Foster. by Perry, Douglas L Foster, Harry, 1956- Series: McGraw-Hill electronic engineering series Material type: Text; Format: print ; Literary form: Not fiction ; Audience: Preschool; Language: English Publication details: New York : McGraw-Hill, c2005 Online resources: Table of contents only Contributor biographical information Publisher description Availability: Items available for loan: Phòng DVTT Tổng hợp (1)Call number: 621.3815 PER 2005. Place hold Log in to add tags Add to cart (remove)